Re: IP protocol on a chip(s)

David Herron -- Resident E-mail Hack (ukma!
19 Dec 87 06:18:06 GMT

In article <In article <1969@geac.UUCP> In article <1969@geac.UUCP> daveb@geac.UUCP (David Collier-Brown) writes:
>In article <4994@elroy.Jpl.Nasa.Gov> david@elroy.Jpl.Nasa.Gov (David Robinson) writes:
>>To increase TCP/IP performance has anyone looked into making an IP
>>protocol chip or chipset?
> .... One I know of in some detail is MNP, an combined
>sync/async facility with Network, Host-host and Applications layers
>(ie, it fits the ARM). ...
> ... Another is the telebit "UUCP emulation" facility in their
>high-speed modems.

er.. I beg to differ ...

At least in the Telebit modems there's a 68000 and a whoooole bunch of
ROM That's not the same sort of thing as people are talking about with
this Chesson Protocol Engine. I think (but don't know for certain)
that MNP modems are in the same league.

One of the lessons of recent computer history is that systems designers
should, once the issues are understood, put things into hardware when
there is gain to be made from doing so. For instance, you can make a
machine that has a fairly "slow" processor and make it do really neat
graphics with the addition of specialized hardware. (I'm talking about
Amiga's here ... compare it's graphics to Mac's and realize that
they're using essentially the same processors).

So, to the extent that some of the gut-level things about routing and
protocols and so forth are well-understood ... YES ... PLEASE PUT THESE

For instance, one obvious thing to have is a co-processor for computing
checksums. And not just one or two types of checksums, but LOTS of
types of 'em. An example here is the DUP-11 we have here running our
connection to BITNET. Either that board or the board from MDB (was it
a DUPV-11 look-alike?) would run at some huge bit-rate like 500K baud.
But it would only run at that baud rate if we were using a protocol
which used the right kind of checksum. But since we're doing BISYNC
to an IBM machine and the type of checksum used for BISYNC is different
from those which DEC (MDB?) supplied on the board. Therefore this
board we have eats up our 11/750 it's installed in because the
Vax has to calculate the checksums itself. (Note, it's been awhile
since I've looked at the details here ... I may have some of
them wrong).

> Neither of the above runs on an unprogrammable chip: even the
>chip-level MNP being developed by two people on this net has a z80
>as part of the silicon.

Oh sorry, you do understand ...

> ... Deciding exactly what to put on
>the chip is a design/marketing (ie $) issue.


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